Document Audience:INTERNAL
Document ID:I0588-1
Title:Unable to boot with certain memory configurations while using 2GB memory banks on systems with PROM version 3.2.25 or less.
Copyright Notice:Copyright © 2005 Sun Microsystems, Inc. All Rights Reserved
Update Date:2004-01-07

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                            FIELD INFORMATION NOTICE
                  (For Authorized Distribution by SunService)
FIN #: I0588-1
Synopsis: Unable to boot with certain memory configurations while using 2GB memory banks on systems with PROM version 3.2.25 or less.
Create Date: Jul/20/00
Keywords: 

Unable to boot with certain memory configurations while using 2GB memory banks on systems with PROM version 3.2.25 or less.

Top FIN/FCO Report: Yes
Products Reference: EXX00 systems with certain memory configurations
Product Category: Server / SW Admin; Server / System CPU Firmware
Product Affected: 
Mkt_ID   Platform   Model   Description       Serial Number   
------   --------   -----   -----------       -------------   
Systems Affected
----------------
  -       E3000      ALL    Ultra Enterprise 3000   -
  -       E3500      ALL    Ultra Enterprise 3500   -
  -       E4000      ALL    Ultra Enterprise 4000   -
  -       E4500      ALL    Ultra Enterprise 4500   -
  -       E5000      ALL    Ultra Enterprise 5000   -
  -       E5500      ALL    Ultra Enterprise 5500   -
  -       E6000      ALL    Ultra Enterprise 6000   -
  -       E6500      ALL    Ultra Enterprise 6500   -

X-Options Affected
------------------
X7026A	  -    -     X-OPT, Memory 2GB (8*256MB)    -
Parts Affected: 
Part Number   Description   Model
-----------   -----------   -----
     -             -          -
References: 
BugId:   4323635
PatchId: 103346-26 or greater 
ECO: WO_17766
Issue Description: 
This FIN provides a solutions to encountering problems while upgrading
the system memory with mixed density memory modules specifically a
combination of 2GB/bank and 1GB/bank memory modules.

When using mixed density memory modules on E3X00 to E6X00 Enterprise
Servers, certain combinations of memory banks result in fatal reset
while running POST before a system boot.  This problem occurs when
using memory modules of 2GB/bank and 1 GB/bank together and memory
interleaving is enabled.  
 
Sample POST error messages below. Note that the FATAL ERROR occurred
while memory was being tested.

   0,0>Board 0 SIMMs Test
   0,0>    MP Memory SIMM Clear Test
   0,0>    Memory Size is 14336Mbytes
   0,0>      CPU MID 1 clearing 00000000.00004000 to 00000000.4aa00000
   0,0>      CPU MID 4 clearing 00000000.4aa00000 to 00000000.95400000
   0,0>      CPU MID 5 clearing 00000000.95400000 to 00000000.dfe00000
   0,0>      CPU MID 8 clearing 00000000.dfe00000 to 00000001.2a800000
   0,0>      CPU MID 9 clearing 00000001.2a800000 to 00000001.75200000
   0,0>      CPU MID 10 clearing 00000001.75200000 to 00000001.bfc00000
   0,0>      CPU MID 11 clearing 00000001.bfc00000 to 00000002.0a600000
   0,0>      CPU MID 12 clearing 00000002.00,0>FATAL ERROR
   0,0>    At time of error: POST was testing Board 0 Memory 
   0,0>    Diagnosis: Board 0, centerplane pin, connector pin, AC
   0,0>    Diagnosis: Board 5, software, any system board
   0,0>Log Date: Mar 20 20:42:34 GMT 2000
   0,0>
   0,0>RESET INFO for CPU/Memory  board in slot 0
   0,0>    AC ESR 00000400.00000000 FT_ARBERR
   0,0>    DC[0] 00
   0,0>    DC[1] 00
   0,0>    DC[2] 00
   0,0>    DC[3] 00
   0,0>    DC[4] 00
   0,0>    DC[5] 00
   0,0>    DC[6] 00
   0,0>    DC[7] 00
   0,0>    FHC  CSR 00050200 LOC_FATAL SYNC NOT_BRD_PRES
   0,0>    FHC RCSR 02000000  FATAL
   0,0>
 
The problem occurs in POST memory interleave initialization and
happened as a result of adding 2GB/bank memory modules to a previously
working system having 1GB/bank memory module.

This has been rectified in PROM version 3.2.26.  This version was
released to SunSolve database on 5/18/2000 as patchid 103346-26 for
installed base customers.  ECO WO_17766 releases this new version of
firmware in Sun Manufacturing to update these Ultra Enterprise
servers.
Implementation: 
---
        |   |   MANDATORY (Fully Pro-Active)
         ---    
         
  
         ---
        |   |   CONTROLLED PRO-ACTIVE (per Sun Geo Plan) 
         --- 
         
                                
         ---
        | X |   REACTIVE (As Required)
         ---
Corrective Action: 
The following recommendation is provided as a guideline for authorized
Enterprise Services Field Representatives and Warranty Customers that
may be encountering the above mentioned problem;

Install firmware version 3.2.26 PROM by applying Patch 103346-26
for E3X00 to E6X00 Enterprise Servers. 

Workarounds can be used to avoid the fatal errors if customers choose 
to remain on PROM version 3.2.25 or less.

WORKAROUNDS:

There are several possible workarounds, from simple to complex if the 
user does not upgrade to firmware version 3.2.26 PROM for E3X00 to E6X00 
Enterprise Servers. 

1. Use memory of same density.  This problem will not show if using memory
   of same density.
   
2. Use minimum interleaving.  In order to set minimum memory interleaving, 
   use the following procedure:
   
   a. Power down the system.
   b. Pull all but one CPU/Memory board out, at least one inch (both CPU and      
      Memory must be on the remaining board)
   c. Power on the system.
   d. At OBP's ok prompt, enter the following command:
   
   	setenv memory-interleave min
   
   e. Power off the system
   f. Re-insert all other CPU/memory boards back into the system.
   g. Power on the system
   h. Boot the system
  
Note: Using minimum interleaving may have a performance impact.
  
3. In order to continue using memory interleaving and mixed memory 
   densities, follow these configuration guidelines.
   
     Configuration #1: 1 bank of 2GB and up to 2 banks of 1GB 
     Configuration #2: 2 banks of 2GB and up to 4 banks of 1GB 
     Configuration #3: 4 banks of 2GB and up to 8 banks of 1GB 
     Configuration #4: 8 banks of 2GB and up to 16 banks of 1GB 
   
It is acceptable to use any number of 64MB or 256MB memory banks in any
of the above mixed memory density configurations.
Comments: 
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